//-----------------------------------------------
//    module name: 
//    author: Liang
//  
//    version: 1st version (2021-10-01)
//    description: 
//        
//
//
//-----------------------------------------------
`timescale 1ns / 1ps
module uart_slot(

    input  wire        clk      ,
    input  wire        rstn     ,
    
    output wire        tx_pin   ,
    input  wire        rx_pin   ,
           
    output wire        outR     ,
    input  wire        inR      ,
    output wire [50:0] data_to  ,
    input  wire [50:0] data_from,
    output wire        inA      ,
    input  wire        outA
    
    );
    
    wire        we       ;
    wire [31:0] addr_i   ;
    wire [31:0] data_i   ;
    wire [31:0] data_o   ;
    wire clk_perip_slot,clk_uart_module;
`ifdef DC_ClKTREE 
    `CLKBUFF buf_clk_13 (.A(clk),.Z(clk_perip_slot));
    `CLKBUFF buf_clk_14 (.A(clk),.Z(clk_uart_module));
`else
    assign  clk_perip_slot = clk;
    assign  clk_uart_module = clk;
`endif

    perip_slot slot(

        .clk                (clk_perip_slot   ),
        .rstn               (rstn             ),
                        
        .outR              (outR              ),
        .inR               (inR               ),
        .data_to           (data_to           ),
        .data_from         (data_from         ),
        .inA               (inA               ),
        .outA              (outA              ),
                        
        .we                (we                ),
        .addr_i            (addr_i            ),
        .data_i            (data_i            ),
        .data_o            (data_o            )
    
    );
    uart_module uart_module(
    
        .clk               (clk_uart_module   ),
        .rstn              (rstn              ),
        
        .we_i              (we                ),
        .addr_i            (addr_i            ),
        .data_i            (data_i            ),
        .data_o            (data_o            ),
        
        .tx_pin            (tx_pin            ),
        .rx_pin            (rx_pin            )
        
    );

endmodule
